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phyCORE-i.MX 8X Carrier Board — Revision 1.0 Schematics (03-22-2026)

Summary

This pull request introduces the Revision 1.0 (2026-03-22) schematics for the CADENCE phyCORE-i.MX 8X Carrier Board.

The design provides a platform for the i.MX 8X System on Module (SOM) for use in CADENCE as a flight computer.


Key Features

  • Dual Samtec connector interface to SOM
  • Multi-rail power architecture (5V, 3.3V, 12V, VBAT nominal 10.8V)
  • Radiation-tolerant watchdog implementation
  • Ethernet (dual port), USB, GNSS, and state of health/telemetry sensors
  • Mixed memory subsystem (OSPI NOR Flash, MRAM, NAND, uSD)
  • Debug interfaces (UART, JTAG, USB bridge)
  • Buffered/differential interfaces

Schematic Page Overview

Page 1 — Block Diagram

  • System-level architecture of the carrier board
  • i.MX 8X SOM interfaced via dual Samtec connectors
  • High-level connectivity: Ethernet, Flash/MRAM, GPS, sensors, and power distribution

Page 2 — IMX8X SOM Samtec Connectors and Notes

  • Some Interface mappings for UART, SPI, and I2C buses
  • Samtec Pinout
  • load switch to power sequence onboard peripherals to prevent damage to IMX8X SOM

Page 3 — Power System

  • Power distribution tree implementation:

    • LT8612 switching regulators (5V, 3.3V rails)
    • CMOS Image Sensor LTC3115-1 boost regulator (12V rail)
    • SCALES LDOs for Ethernet PHY and sensitive rails
    • power LEDs (also shows when power switch on/off)

Page 4 — External Watchdog Timer

  • Radiation-tolerant watchdog (SCALES-inspired design)
  • TLV1704 comparator-based implementation
  • Ensures system recovery in fault conditions

Page 5 — User Controls

  • Power switch
  • SOM reset button
  • 4-position DIP switch for boot mode selection
  • LED to show when SOM is reset

Page 6 — microSD Interface

  • Standard microSD slot via uSDHC1 interface

Page 7 — Flash and MRAM Memory

  • 512 Mbit OSPI NOR Flash
  • 4 Mbit MRAM for critical data
  • NAND Flash for non-critical storage

Page 8 — Ethernet PHY

  • TI DP83867IR Gigabit Ethernet PHY (present on SOM as well)
  • RGMII interface to SOM
  • Integrated clocking circuitry

Page 9 — Ethernet Connectors

  • Dual RJ45 (ETH0, ETH1) implementation
  • SRV05-4LCT surge/ESD protection diodes

Page 10 — USB Ports

  • USB-C (development/debug)
  • USB-A host port
  • LM1085 regulator supplying 3.3V from VBUS

Page 11 — Payload Board Connection

  • External payload interface:

    • SN65C1168 RS-422 transceiver
    • 16-pin payload connector
    • P82B715 I2C buffer for long-distance comms

Page 12 — Blank

  • Intentionally left blank (I2C Buffers integrated with external board connections)

Page 13 — GPS and Power Monitor

  • Skytraq Orion B16 GPS module
  • INA219 power monitor for GPS rail

Page 14 — Onboard Sensors

  • Sensor/peripheral suite includes:

    • RV-3028-C7 RTC
    • LSM6DSO Accelerometer & Gyroscope
    • LIS2MDL magnetometer
    • TMP112 temperature sensor
    • INA219 (main board & voltage rail/device power monitoring)

Page 15 — Debug USB (UART/JTAG)

  • FT2232HL USB-to-UART/JTAG bridge
  • Enables full system debugging via USB-C

Page 16 — External and SATNOGS Connections

  • Interfaces for:

    • SATNOGS
    • Ebyte RF module
    • Debug headers for probing and testing
    • preliminary ADCS communication connection
    • preliminary Heater trigger connection

Notes

  • Designed with radiation tolerance considerations for LEO environments wherever possible
  • Rad-tested parts from EEERadiation Database and IEEE Radiation Effects Data Workshop
  • Supports both development and flight-like configurations for Engineering Model

as-470 and others added 30 commits June 10, 2025 13:26
RADEFT symbols are in a kicad_sym library file. RADEFT footprints are in a .pretty folder file.
in process of implementing changes for rev2
uploaded cygnet devboard v1 firmware reference & updated schematic and layout for v2 demo. to do: assign new jlc part numbers
Uses CD-PA1616D from Adafruit
Using RP2350.
To do list listed inside KiCAD main page.
Will continue to work on it in available time.
- more decoupling caps
- i2c address config
-implemented 3.3v to 12v boost converter
-radfet readout circuitry done (i think)
-added readout circuitry from oresat & proves fc v5c board
-finished gps schematic (need footprint still)
-added few LEDs

main priorities:
-watchdog circuit
-calculate voltage div resistor values for 12v
-gps footprint
- removed pullup resistors on i2c 0 (proves board has the pullups)
- will be adding nand flash for more long term storage of gps and radfet data & telemetry
- gps footprint not finished but started. will finish when i get access to a mouse
- refined gps footprint
- reorganized schematic
jfets no more for now. Also added footprints to some symbols.
- using analog switch ic to switch between sense & readout (tmux1133)
- added non inverting buffer for voltage readout
- haven't fully deep dived into the new components & must look into more
-replaced custom circuitry with radfet readout modules
-cleaned up sensor schematic page
-changed temp sensor
-added more missing footprints
ShadowFruits and others added 30 commits May 8, 2026 01:22
- payload rs-422 completed
- fixed some power net names
- can bus to satnogs
- gps uart
- ftdi uart
- spi & octal spi to memories
- microsd
- more digital signal connections
…hematic

- continued doing more layout for digital traces such as i2c
- fixed some missing connections
Did the load switch layout- still needs to be connected to the pin header
made more progress on power connections between components, adjusted some trace connections (like microSD), more digital connections, etc.
- Load switch mostly done: Just need to do PX-good connection to header.
-Started connecting the Trigger Buffer, just need to do LED connections.
- see jlcpcb impedance calcs in discord chat
- trace width for usb connections may be incorrect from human error (typed 6 instead of 7?)
- need to finish one more usb-c
Check whether P_3V3's D1 LED needs to be moved closer to the switch?
Moved the I2C for peripherals to make routing easier for the Level shifter to the Imx8x som
changed most debugs to 1.27mm headers instead of 2.54mm
- removed more unused global labels on imx8x som schematic
- finished majority of digital connections
(only few left like jtag, ethernet, usb, header pins *shudder*)
- pushing schematic changes described in previous commit
- issue where one of the gpios and microsd pins were switched
- usb connections fixed
- ethernet connection #2 made (needs length tuning
- ethernet power or decoupling on the side of ethernet 1 needs to be connected still. new to reconnect few gpios, heater trigger, jtag to ftdi, debug headers
fixed microsd orientation, some digital connections disconnected from enet, removed some gnd and m40 uart header pins
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5 participants