MDMM hardware-aware metrics (FPGA + PACA), tests and docs

[ArghyaRanjanDas]

Summary

• Add FPGAAwareSparsity and PACAPattern MDMM metrics to both the Keras and Torch backends, ported onto dev's per-backend layout. Supersedes MDMM tests and hardware-aware metric functions #37, which was built on the old single pruning_methods/ tree and targeted main.
• Fix the Pydantic serialization warnings reported on MDMM tests and hardware-aware metric functions #37 (the constraint_type enum and the discriminated pruning_parameters union). Root cause: the MDMM enum fields defaulted to bare strings, and Pydantic does not validate/coerce defaults, so the runtime value stayed a str. They now default to enum members.
• Move metric validation into MDMMPruningModel (ge/le + Literal) and drop the per-metric asserts. PACA auto-forces Equality/target 0 via a model_validator, so the MDMM layer stays metric-agnostic.
• Run pattern selection on-graph (keras.ops bit-pack + bincount, native torch.unique, no NumPy round-trip of the weight); centralise distance/layout/resource constants in core/constants.py; fix the get_layer_sparsity float/int dtype bug on the TF backend.
• Add config_mdmm_fpga.yaml, config_mdmm_paca.yaml, the mdmm_fpga_config() / mdmm_paca_config() helpers, and document the new metric types in reference.md and getting_started.md.

Test plan

• cd tests && pytest test_mdmm.py test_mdmm_metrics.py (Keras / TensorFlow)
• cd tests && KERAS_BACKEND=torch pytest test_mdmm.py test_mdmm_metrics.py (Keras / Torch)
• cd tests && KERAS_BACKEND=torch pytest test_torch_mdmm.py (native Torch)
• Load config_mdmm_fpga.yaml and config_mdmm_paca.yaml, call model_dump(), confirm no PydanticSerializationUnexpectedValue warnings.
• Existing methods unaffected: pytest test_pdp.py test_ap.py.

Notes for review

• Most of the MDMM tests and hardware-aware metric functions #37 inline comments are already satisfied by dev's restructure: metric_type is read off the config and resolved via the metric registry, and the MetricType / ConstraintType enums already exist. This PR keeps that flat-params + registry approach rather than nested metric models.
• The patterns.py no-op OIHW->OIHW permute is replaced with real per-backend layout handling (Keras kernels are HWIO, Torch OIHW), and the convert_to_numpy pattern step is gone.
• The shipped FPGA config uses Equality/target 0; happy to change the default constraint if you prefer a different target for structured group-sparsity.